--- src/boards/console.cst	Fri Oct 31 10:27:08 2025
+++ src/boards/console.cst	Fri Nov  7 13:24:10 2025
@@ -301,3 +301,15 @@
 IO_PORT "ddr_dqs[1]" IO_TYPE=SSTL15D PULL_MODE=NONE DRIVE=8 SINGLE_RESISTOR=OFF BANK_VCCIO=1.5;
 IO_LOC "ddr_dqs[0]" Y3,AA3;
 IO_PORT "ddr_dqs[0]" IO_TYPE=SSTL15D PULL_MODE=NONE DRIVE=8 SINGLE_RESISTOR=OFF BANK_VCCIO=1.5;
+
+// PS2
+IO_LOC "PS2_CLK" F18;
+IO_PORT "PS2_CLK" IO_TYPE=LVCMOS33;
+IO_LOC "PS2_DAT" V18;
+IO_PORT "PS2_DAT" IO_TYPE=LVCMOS33;
+
+IO_LOC "PS2_CLK2" E18;
+IO_PORT "PS2_CLK2" IO_TYPE=LVCMOS33;
+IO_LOC "PS2_DAT2" V19;
+IO_PORT "PS2_DAT2" IO_TYPE=LVCMOS33;
+
--- src/soc/ps2.v	Fri Oct 31 10:27:08 2025
+++ src/soc/ps2.v	Fri Nov  7 17:07:45 2025
@@ -48,16 +48,12 @@
 	output                  a20_enable,
 
 	//ps2 keyboard
-	input                   ps2_kbclk,
-	input                   ps2_kbdat,
-	output                  ps2_kbclk_out,
-	output                  ps2_kbdat_out,
+	inout                   ps2_kbclk,
+	inout                   ps2_kbdat,
 
 	//ps2 mouse
-	input                   ps2_mouseclk,
-	input                   ps2_mousedat,
-	output                  ps2_mouseclk_out,
-	output                  ps2_mousedat_out
+	inout                   ps2_mouseclk,
+	inout                   ps2_mousedat
 );
 
 wire io_m_read    = io_read  & io_cs;
@@ -384,8 +380,8 @@
 
 //------------------------------------------------------------------------------ ps/2 for keyboard
 
-assign ps2_kbclk_out = ~ps2_kbclk_ena;
-assign ps2_kbdat_out = ~ps2_kbdat_ena | ps2_kbdat_host;
+assign ps2_kbclk    = (ps2_kbclk_ena)?      ps2_kbclk_out       : 1'bZ;
+assign ps2_kbdat    = (ps2_kbdat_ena)?      ps2_kbdat_out       : 1'bZ;
 
 reg ps2_kbclk_ena;
 always @(posedge clk) begin
@@ -395,6 +391,12 @@
     else if(keyb_state == PS2_SEND_CLOCK_RELEASE || keyb_state == PS2_WAIT_FINISH)  ps2_kbclk_ena <= 1'b0;
 end
 
+reg ps2_kbclk_out;
+always @(posedge clk or negedge rst_n) begin
+    if(rst_n == 1'b0)                                                           ps2_kbclk_out <= 1'b0;
+    else if(keyb_state == PS2_SEND_INHIBIT || keyb_state == PS2_WAIT_START)     ps2_kbclk_out <= 1'b0;
+end
+
 reg ps2_kbdat_ena;
 always @(posedge clk) begin
     if(rst_n == 1'b0)                                           ps2_kbdat_ena <= 1'b0;
@@ -403,12 +405,12 @@
     else if(ps2_kb_write_shift && keyb_bit_counter == 4'd9)     ps2_kbdat_ena <= 1'b0;  //stop bit
 end
 
-reg ps2_kbdat_host;
-always @(posedge clk) begin
-    if(rst_n == 1'b0)                                       ps2_kbdat_host <= 1'b0;
-    else if(keyb_state == PS2_SEND_DATA_LOW)                ps2_kbdat_host <= 1'b0;              //start bit
-    else if(ps2_kb_write_shift && keyb_bit_counter < 4'd8)  ps2_kbdat_host <= inputbuffer[0];    //data bits
-    else if(ps2_kb_write_shift && keyb_bit_counter == 4'd8) ps2_kbdat_host <= ~(keyb_parity);    //parity bit
+reg ps2_kbdat_out;
+always @(posedge clk or negedge rst_n) begin
+    if(rst_n == 1'b0)                                       ps2_kbdat_out <= 1'b0;
+    else if(keyb_state == PS2_SEND_DATA_LOW)                ps2_kbdat_out <= 1'b0;              //start bit
+    else if(ps2_kb_write_shift && keyb_bit_counter < 4'd8)  ps2_kbdat_out <= inputbuffer[0];    //data bits
+    else if(ps2_kb_write_shift && keyb_bit_counter == 4'd8) ps2_kbdat_out <= ~(keyb_parity);    //parity bit
 end
 
 reg [15:0] keyb_clk_mv;
@@ -643,8 +645,8 @@
 
 //------------------------------------------------------------------------------ ps/2 for mouse
 
-assign ps2_mouseclk_out    = ~ps2_mouseclk_ena;
-assign ps2_mousedat_out    = ~ps2_mousedat_ena | ps2_mousedat_host;
+assign ps2_mouseclk    = (ps2_mouseclk_ena)?      ps2_mouseclk_out       : 1'bZ;
+assign ps2_mousedat    = (ps2_mousedat_ena)?      ps2_mousedat_out       : 1'bZ;
 
 reg ps2_mouseclk_ena;
 always @(posedge clk) begin
@@ -654,6 +656,12 @@
     else if(mouse_state == PS2_SEND_CLOCK_RELEASE || mouse_state == PS2_WAIT_FINISH)    ps2_mouseclk_ena <= 1'b0;
 end
 
+reg ps2_mouseclk_out;
+always @(posedge clk or negedge rst_n) begin
+    if(rst_n == 1'b0)                                                           ps2_mouseclk_out <= 1'b0;
+    else if(mouse_state == PS2_SEND_INHIBIT || mouse_state == PS2_WAIT_START)   ps2_mouseclk_out <= 1'b0;
+end
+
 reg ps2_mousedat_ena;
 always @(posedge clk) begin
     if(rst_n == 1'b0)                                               ps2_mousedat_ena <= 1'b0;
@@ -662,12 +670,12 @@
     else if(ps2_mouse_write_shift && mouse_bit_counter == 4'd9)     ps2_mousedat_ena <= 1'b0;  //stop bit
 end
 
-reg ps2_mousedat_host;
-always @(posedge clk) begin
-    if(rst_n == 1'b0)                                           ps2_mousedat_host <= 1'b0;
-    else if(mouse_state == PS2_SEND_DATA_LOW)                   ps2_mousedat_host <= 1'b0;               //start bit
-    else if(ps2_mouse_write_shift && mouse_bit_counter < 4'd8)  ps2_mousedat_host <= inputbuffer[0];     //data bits
-    else if(ps2_mouse_write_shift && mouse_bit_counter == 4'd8) ps2_mousedat_host <= ~(mouse_parity);    //parity bit
+reg ps2_mousedat_out;
+always @(posedge clk or negedge rst_n) begin
+    if(rst_n == 1'b0)                                           ps2_mousedat_out <= 1'b0;
+    else if(mouse_state == PS2_SEND_DATA_LOW)                   ps2_mousedat_out <= 1'b0;               //start bit
+    else if(ps2_mouse_write_shift && mouse_bit_counter < 4'd8)  ps2_mousedat_out <= inputbuffer[0];     //data bits
+    else if(ps2_mouse_write_shift && mouse_bit_counter == 4'd8) ps2_mousedat_out <= ~(mouse_parity);    //parity bit
 end
 
 reg [15:0] mouse_clk_mv;
--- src/ao486_top.v	Fri Oct 31 10:27:08 2025
+++ src/ao486_top.v	Fri Nov  7 17:08:39 2025
@@ -57,6 +57,12 @@
     inout               sd_cmd,
     inout         [3:0] sd_dat,
 
+    // PS/2 keyboard/mouse interface
+    inout               PS2_CLK,
+    inout               PS2_DAT,
+    inout               PS2_CLK2,
+    inout               PS2_DAT2,
+
     // PS/2 keyboard
     input               ps2_kbclk_in,
     input               ps2_kbdat_in,
@@ -191,6 +197,13 @@
     .sd_cmd(sd_cmd),
     .sd_dat(sd_dat),
 
+    // PS2
+    .kbd_ps2_clk(PS2_CLK),
+    .kbd_ps2_dat(PS2_DAT),
+
+    .mouse_ps2_clk(PS2_CLK2),
+    .mouse_ps2_dat(PS2_DAT2),
+
     // UART bridge
     .dbg_uart_byte(dbg_uart_byte),
     .dbg_uart_we(dbg_uart_we),
@@ -253,6 +266,7 @@
 	out_r <= (^tmp_r[16:15]) ? {tmp_r[16], {15{tmp_r[15]}}} : tmp_r[15:0];
 end
 
+/* Disabling PS/2 keyboard and mouse UART emulation
 uart2ps2 #(.CLK_FREQ(SYS_FREQ), .BAUD(115200)) u_uart2ps2 (
     .clk(clk_sys), 
     .resetn(~reset),
@@ -266,7 +280,7 @@
     .mouse_host_cmd_rd(mouse_host_cmd_rd),
     .dbg_byte(dbg_uart_byte), 
     .dbg_we(dbg_uart_we)
-);
+);*/
 
 // HDMI output
 wire init_calib_complete;
--- src/system.sv	Fri Oct 31 10:27:08 2025
+++ src/system.sv	Fri Nov  7 17:09:28 2025
@@ -27,6 +27,13 @@
     inout         sd_cmd,
     inout  [3:0]  sd_dat,
 
+    // PS2
+    inout wire    kbd_ps2_clk,
+    inout wire    kbd_ps2_dat,
+
+    inout wire    mouse_ps2_clk,
+    inout wire    mouse_ps2_dat,
+
 	// Keyboard byte stream (for injecting PS/2 scancodes)
 	input   [7:0] kbd_data,
 	input         kbd_data_valid,
@@ -729,16 +736,6 @@
 	.irq               (irq_0)
 );
 
-// Internal PS/2 wires from keyboard device to controller
-wire kbd_ps2_clk;
-wire kbd_ps2_dat;
-wire ps2_kbclk_out;
-wire ps2_kbdat_out;
-// Internal PS/2 wires from mouse device to controller
-wire mouse_ps2_clk;
-wire mouse_ps2_dat;
-wire ps2_mouseclk_out;
-wire ps2_mousedat_out;
 wire ps2_reset_n;
 
 ps2 ps2
@@ -756,14 +753,10 @@
 
 	.ps2_kbclk         (kbd_ps2_clk),
 	.ps2_kbdat         (kbd_ps2_dat),
-	.ps2_kbclk_out     (ps2_kbclk_out),
-	.ps2_kbdat_out     (ps2_kbdat_out),
 
 	// Route mouse via internal PS/2 device generator
 	.ps2_mouseclk      (mouse_ps2_clk),
 	.ps2_mousedat      (mouse_ps2_dat),
-	.ps2_mouseclk_out  (ps2_mouseclk_out),
-	.ps2_mousedat_out  (ps2_mousedat_out),
 
 	.output_a20_enable (),
 	.output_reset_n    (ps2_reset_n),
@@ -963,6 +956,7 @@
     end
 end
 
+/* Disabling PS/2 keyboard and mouse UART emulation
 ps2_device ps2_kbd (
     .clk_sys      (clk_sys),
     .reset        (rst[11]),
@@ -976,13 +970,14 @@
     .ps2_dat_in   (ps2_kbdat_out),
     .rdata        (kbd_host_data),
     .rd           (kbd_host_data_clear)
-);
+);*/
 
     // PS/2 mouse device: translate UART-injected mouse bytes to PS/2 lines
 // Also expose host->device bytes via rdata so we can forward them over UART
 // wire [8:0] mouse_host_cmd;
 // rd comes from top-level uart2ps2
 // reg        mouse_host_cmd_rd;
+/* Disabling PS/2 keyboard and mouse UART emulation
 ps2_device ps2_mouse (
     .clk_sys      (clk_sys),
     .reset        (rst[12]),
@@ -996,7 +991,7 @@
     .ps2_dat_in   (ps2_mousedat_out),
     .rdata        (mouse_host_cmd),
     .rd           (mouse_host_cmd_clear)
-);
+);*/
 
 //
 // Boot loader FSM - loads BIOS and VGA BIOS from SD card to DDR memory
--- 486tang_console138k.gprj	Fri Oct 31 10:27:08 2025
+++ 486tang_console138k.gprj	Fri Nov  7 11:56:19 2025
@@ -56,12 +56,10 @@
         <File path="src/common/async_fifo.v" type="file.verilog" enable="1"/>
         <File path="src/common/cdc_vector_handshake_continuous.sv" type="file.verilog" enable="1"/>
         <File path="src/common/dpram.v" type="file.verilog" enable="1"/>
-        <File path="src/common/ps2_device.v" type="file.verilog" enable="1"/>
         <File path="src/common/simple_fifo.v" type="file.verilog" enable="1"/>
         <File path="src/common/simple_mult.v" type="file.verilog" enable="1"/>
         <File path="src/common/simple_ram.v" type="file.verilog" enable="1"/>
         <File path="src/common/synchronizer.sv" type="file.verilog" enable="1"/>
-        <File path="src/common/uart2ps2.v" type="file.verilog" enable="1"/>
         <File path="src/common/uart_fixed.v" type="file.verilog" enable="1"/>
         <File path="src/common/uart_tx_V2.v" type="file.verilog" enable="1"/>
         <File path="src/ddr3_framebuffer.v" type="file.verilog" enable="1"/>
